Sigma-delta analog-to-digital converters (ADC) are well known in the art. These ADCs oversample an input and then reconstruct that input. The ADC digitizes the amount of error by integration. Digital information (e.g., a bit) can be left from the sampling process and this left over information remains on the integration capacitors and adds up, eventually causing an improper increase or decrease to the next quantization level. These artifacts appear as an incorrect digital output code. Extra filtering, such as by digital sinc filters, of the output is required to remove the false outputs. However, these filters require large gate counts, consuming large silicon area and power.